Multi-project wafer service

Multi-project chip (MPC), also known as multi-project wafer (MPW), services integrate onto microelectronics wafers a number of different integrated circuit designs from various teams including designs from private firms, students and researchers from universities. Because IC fabrication costs are extremely high, it makes sense to share mask and wafer resources to produce designs in low quantities. Worldwide, several MPW services are available from government-supported institutions or from private firms including MOSIS,[1] CMP,[2] Europractice,[3] eSilicon,[4] and WaferCatalyst.[5]

The first well known MPW service was MOSIS (Metal Oxide Silicon Implementation Service), established by DARPA as a technical and human infrastructure for VLSI. MOSIS began in 1981 after Lynn Conway organized the first VLSI System Design Course at MIT in 1978. MOSIS primarily services commercial users now but continues to serve university students and researchers.

With MOSIS, designs are submitted for fabrication using either open (i.e., non-proprietary) VLSI layout design rules or vendor proprietary rules. Designs are pooled into common lots and run through the fabrication process at foundries. The completed chips (packaged or unpackaged) are returned to customers.

eSilicon announced the availability of automated online MPW quotes in September 2013. Using MPW Explorer, users can evaluate the cost of different options such as foundry, technology and packaging.[6]

BaySand announced their ASIC MPW Shuttle Program, named ASIC UltraShuttle.[7] BaySand stated that their shuttle program enables customer to tapeout from RTL and BaySand will deliver 100 units of tested, packaged chips within 8 weeks.[8]

Many silicon fabrication facilities offer MPW runs or a company can produce its own MPW, e.g. combine several of its own designs to form one wafer completely owned by the company. In the latter case, it may be profitable to use most of the wafer for production chips and a small portion for producing prototypes of next generation chips.

References

  1. ↑ http://www.mosis.com/
  2. ↑ http://cmp.imag.fr/
  3. ↑ http://www.europractice-ic.com/
  4. ↑ http://www.esilicon.com/
  5. ↑ http://www.wafercat.com
  6. ↑ http://www.eetimes.com/document.asp?doc_id=1320942
  7. ↑ "BaySand to Initiate a Unique Low Cost Multi Project Wafer (MPW) Program". BaySand Inc. 2016-07-22. Retrieved 2016-08-15.
  8. ↑ "Multi Project Wafer Program (MPW) - BaySand's ASIC UltraShuttle". BaySand Inc. Retrieved 2016-08-15.

External links

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